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Fracture Toughness of Lead Free Solder Interfaces

Current printed circuit board assemblies are empirically tested for reliability certification. A more rigorous approach is use fracture mechanics. However, to apply fracture mechanics and crack growth models to reliability testing of microelectronics, such as ball grid array solder joints on microelectronic circuit boards, fundamental properties such as fracture toughness must be known. The objective of the research is to use ASTM E399 based testing to determine the fracture toughness for various lead free solder-surface finished copper combinations to determine the influence surface finish has on fracture toughness and to provide some understanding of the role of dislocations in creating macro features observed on the fractured solder. The research intends to provide supporting data for the use of a linear elastic fracture mechanics approach to ball grid array (BGA) solder joint reliability evaluation for shock testing. 
 
Research is funded by Intel Corporation and the Oregon Metals Initiative